Date of Graduation

5-2013

Document Type

Dissertation

Degree Name

Doctor of Philosophy in Engineering (PhD)

Degree Level

Graduate

Department

Electrical Engineering

Advisor

Homer A. Mantooth

Committee Member

Susan Burkett

Second Committee Member

James P. Parkerson

Third Committee Member

Leonard W. Schaper

Fourth Committee Member

Richard Ulrich

Fifth Committee Member

Vijay K. Varadan

Abstract

Silicon carbide-based power devices play an increasingly important role in modern power conversion systems. Finding a means to reduce the size and complexity of these systems by even incremental amounts can have a significant impact on cost and reliability. One approach to achieving this goal is the die-level integration of gate driver circuitry with the SiC power devices. Aside from cost reductions, there are significant advantages to the integration of the gate driver circuits with the power devices. By integrating the gate driver circuitry with the power devices, the parasitic inductances traditionally seen between the gate driver and the switching devices can be significantly reduced, allowing faster switching speeds, which in turn leads to higher efficiencies, less aggressive thermal management requirements, and physically smaller passives.

Collaborators from Toyota, Cree, the University of Arkansas, Oak Ridge National Labs, and Arkansas Power Electronics International have designed, fabricated, and tested a custom gate driver circuit implemented in a low-voltage SiC-based process by Cree. This gate driver implementation is the first step toward the goal of a completely integrated system. One key sub-component of this gate driver is the Under Voltage Lock-Out (UVLO) circuit, which asserts a signal whenever the supply voltage to the die falls below a set threshold and allows circuitry both on- and off-chip to take steps to prevent damage to the system. The work presented herein is the design, layout, and testing of a UVLO circuit implemented in the low-voltage silicon carbide process available from Cree. The UVLO was demonstrated to operate over a temperature range between -55 oC and 300 oC. An overview of the gate driver design, the fabrication process, and the trade-offs made during the UVLO circuit design process will be presented, as well as the integrated circuit layout workflow. A synopsis of the die testing apparatus and results will also be provided.

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