Document Type

Patent

Publication Date

9-2-2003

Abstract

A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer is described. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1x10^20 dopant atoms per cm3 of silicon.

Department

Electrical Engineering

Patent Number

US6613653

Application Number

US20020055240

Application Published

5-9-2002

Application Filed

12-31-2001

Assignee

Board of Trustees of the University of Arkansas (Little Rock, AR)

Comments

Hameed A. Naseem, Department of Electrical Engineering; M. Shahidul Haque, Department of Electrical Engineering; William D. Brown, Department of Electrical Engineering

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