Single component sleep-convention logic (SCL) modules

Inventors

Scott C. Smith, University of Arkansas, Fayetteville
Jia Di, University of Arkansas, Fayetteville
Jerry Frenkil
Aaron Arthurs
Ron B. Foster

Document Type

Patent

Publication Date

7-28-2015

Abstract

Describes a multi-rail module having mutually exclusive outputs. The module includes first and second-rail logic circuits, first and second-rail driver circuits, and a PMOS transistor sourcing V_DD to both the first and second driver circuits. The first-rail logic circuit is coupled to V_DD and ground, and has a first logic input and a first logic output. The second-rail logic circuit is coupled to V_DD and ground, and has a second logic input and a second logic output. The first-rail driver circuit is coupled to ground, receives the first logic output, and has a first-rail output Q¹. The second-rail driver circuit is coupled to ground, receives the second logic output, and has a second-rail output Q⁰. The PMOS transistor has a gate driven by a SLEEP signal.

Department

Computer Science & Computer Engineering; Electrical Engineering

Patent Number

US9094013

Application Number

US20140347097 A1

Application Published

11-27-2014

Application Filed

5-24-2013

Assignee

Board of Trustees of the University of Arkansas (Little Rock, AR); NanoWatt Design, LLC (Fayetteville, AR)

Comments

Scott C. Smith, Department of Electrical Engineering, University of Arkansas, Fayetteville, AR
Jia Di, Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, AR

Citation

Smith, S. C., Di, J., Frenkil, J., Arthurs, A., & Foster, R. B. (2015). Single component sleep-convention logic (SCL) modules. Patents Granted. Retrieved from https://scholarworks.uark.edu/pat/4