Document Type

Patent

Publication Date

7-14-2015

Abstract

A Static Sleep Convention Logic (SSCL) circuit is described. The circuit improves upon Multi-Threshold NULL Convention Logic (MTNCL), disclosed in U.S. Pat. No. 7,977,972, by utilizing the SECRII architecture along with the Bit-Wise MTNCL technique, to produce a new SSCL gate without an nsleep input, which yields a smaller and faster circuit that utilizes less energy per operation than the patented SMTNCL gate design, while only very slightly increasing leakage power during sleep mode.

Department

Computer Science and Computer Engineering; Electrical Engineering

Patent Number

US9083337

Application Number

US20130181740 A1

Application Published

7-18-2013

Application Filed

1-11-2013

Assignee

Board of Trustees of the University of Arkansas (Little Rock, AR)

Comments

Scott C. Smith, Department of Electrical Engineering; Jia Di, Department of Computer Science and Computer Engineering

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