Date of Graduation


Document Type


Degree Name

Master of Science in Electrical Engineering (MSEE)

Degree Level



Electrical Engineering


H. Alan Mantooth

Committee Member

Simon Ang

Second Committee Member

J. Ambrose Wolf


Ceramic, LTCC, manufacturing, Shrinkage Field Mapping


Low temperature co-fired ceramic (LTCC) has many benefits when it comes to electronic packaging due to the low dielectric loss, reliability in extreme environments, and high breakdown voltage. Though the ceramic has a lot of benefits it is not widely used due to the high cost and complexities associated with manufacturing. One of these issues with manufacturing is compensating for the shrinkage of the ceramic, this is accomplished by using an expansion factor, creating the “green” or manufactured design. This expansion factor is approximated through knowledge of the ceramic factors such as the metal loading, layers of ceramic tape, firing profile, lamination pressures, etc. While this expansion factor method has been studied and equations have been derived for compensation for the shrinkage, there is little evidence that the equations correctly compensate for the complexities of the design. Due to the lack of understanding of how different design parameters play a role in the shrinkage of the panel, this thesis will look to address the fundamental issue of measuring the shrinkage effects due to metal loading using a shrinkage characterization method called shrinkage field mapping. Due to the increased measurements needed for shrinkage field mapping, image processing is used to extract dimensions without dramatically increasing measurement time for the High-Density Electronics Center LTCC process. With the change in the shrinkage measurements, a 0.07-0.25% characteristic shrinkage difference can be measured from changing the volume of metal inside by 1.22mm3 in a DuPont 9k7 50mm x 50mm panel. These measurements were confirmed by three different fabrication experiments.