Date of Graduation
Bachelor of Science in Mechanical Engineering
Uchechukwu C. Wejinya
Committee Member/Second Reader
Electronic flip chip assemblies consist of dissimilar component materials, which exhibit different CTE. Under thermal cyclic operating conditions, this CTE mismatch produces interfacial and interconnect stresses, which are highly dependent on system layout. In this paper, sensitivity analyses are performed using ANSYS FEA to establish how the proximity and arrangement of neighboring devices affect interconnect stress. Flip chip alignment modes ranging from edge-to-edge to corner-to-corner are studied. Results of these FEA studies, demonstrated that closely packing devices together has the effect of making them act as one. This results in a significant increase in the thermomechanical stresses induced on peripheral solder joints, heightening reliability risk. The sensitivity subsides gradually as device spacing increases, and eventually stops being a factor. 6mm is the threshold separation at which this occurs, in both edge-edge and corner-corner placement, for the system under analysis in this paper. Understanding the effect of system layout is instrumental for optimizing system design and improving reliability of power modules to meet the increasing power density needs.
Iradukunda, A. C. (2017). System-Layout-Dependent Thermally Induced Solder Stress & Reliability Implications. Mechanical Engineering Undergraduate Honors Theses Retrieved from https://scholarworks.uark.edu/meeguht/64
Computer-Aided Engineering and Design Commons, Electro-Mechanical Systems Commons, Electronic Devices and Semiconductor Manufacturing Commons, Energy Systems Commons, Power and Energy Commons, Signal Processing Commons