Date of Graduation
Master of Science in Microelectronics-Photonics (MS)
Hameed A. Naseem
Second Committee Member
Third Committee Member
Controlled and ordered growth of Si nanowires through a low temperature fabrication method compatible with CMOS processing lines is a highly desirable replacement to future electronic fabrication technologies as well as a candidate for a low cost route to inexpensive photovoltaics. This stems from the fact that traditional CMOS based electronics are hitting physical barriers that are slowing the Moore's Law trend as well as the demand for an inexpensive solar cell technology that can obtain grid parity. A fractional factorial growth study is presented that compares the growth of Au and Al catalyzed Si nanowires at temperatures ranging from 150 to 400°C. Dense and prolific growth of Si nanowires onandSi substrates as well as glass substrates was obtained using a Au catalyst at temperatures of 400°C. An overview is given that considers all growth experiments and includes TEM analysis of individual Si nanowires grown on Si substrates showing nanowires to be both crystalline and amorphous in nature. Optical transmission data of bulk Si nanowire films on glass substrates showed that the collective optical properties were highly desirable as transmission was minimized over the 300 to 1400 nm wavelength range at different transmission angles. Collectively, a growth platform is presented from which further material study will yield advanced Si nanowire based devices, satisfying a demand by the ITRS and the scientific community at large for electronics that can continue the Moore's law trend and inexpensive photovoltaics capable of meeting the consumer demand for grid parity.
Young, Matthew Garett, "Fabrication of Vertical Silicon Nanowires through Metal Assisted Deposition" (2012). Theses and Dissertations. 380.