Date of Graduation

9-2023

Document Type

Dissertation

Degree Name

Doctor of Philosophy in Microelectronics-Photonics (PhD)

Degree Level

Graduate

Department

Microelectronics-Photonics

Advisor/Mentor

Alan Mantooth

Committee Member

David Huitink

Second Committee Member

Wing Ning Li

Third Committee Member

Gregory Salamo

Fourth Committee Member

Matt Leftwich

Keywords

Automation, Design rules, Fillet, Partial discharge, Power modules, PowerSynth

Abstract

Power modules used for the conversion and conditioning of electrical power for applications like electric vehicles, more-electric aircraft, the power grid, etc., are largely designed manually by engineers. Design automation of power modules is starting to gain recognition as a timely and necessary alternative to intuitive manual design and fabrication. With increasing need for wide bandgap materials that can operate at higher voltages, and the need to make modules more compact, hazards like electrical breakdown are more likely. Partial discharge (PD) is a silent and invisible precursor to electrical breakdown. It is compounded with compaction, creating a potential for electrical breakdown and catastrophic failure of the module package. Instead of being the limiting factor, or even a hazard, power module packages need to keep pace with the advancements being made in wide bandgap technology. While the automation of power module design is still new, and research and standards on PD in power modules are limited, this dissertation is a significant step in designing for high voltage operation while assessing tradeoffs against module compaction in an electronic design automation tool. This dissertation describes a method of systematically accounting for partial discharge in power modules using a unique approach where improvements to a module layout are determined in terms of design rules. Trace gaps, in this method, are designed to be functions of operating voltage, substrate and encapsulant material choice, and layer thicknesses of the substrate. These design rules are based on simulations that are validated by physical PD experiments. Furthermore, filleting is performed on the final layouts to further reduce PD by reducing the E-field concentrations by a third. This methodology has been implemented in PowerSynth, an in-house hardware-validated electronic design automation tool that performs electro-thermal and mechanical layout optimization. Before the implementation of this work, layouts were agnostic to PD. From the contribution of this work, the layouts now generated by the tool are PD-mitigated, with a maximum operating voltage for each layer stack. Below the rated voltage, the user can choose multiple voltage-trace gap trade off options for the layout. Demonstrating this implementation in this work shows that the user can achieve either a 24% improvement in voltage level, or a 20% improvement in area reduction, or a trade-off combination of the two. As layouts increase in complexity, these improvements will likely grow. The implementation of this work allows room for growth by allowing customized PD data libraries from various manufacturing lines to inform design rules much like a process design kit in the field of integrated circuit design. The designer using PowerSynth can: 1.) Use default libraries for design rules, or 2.) Perform their own simulations to augment the existing PD data library according to the method presented here, or 3.) Fabricate their own test structures and design corresponding simulations to develop their own complete PD data library and import it to PowerSynth. The manufacturable modules resulting from this tool are thus designed to be practical and reliable for high voltage operation.

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