Date of Graduation


Document Type


Degree Name

Doctor of Philosophy in Microelectronics-Photonics (PhD)

Degree Level





Hameed Naseem

Committee Member

Samir El-Ghazaly

Second Committee Member

Surendra Singh

Third Committee Member

Salvador Barraza-Lopez

Fourth Committee Member

Rick Wise


Applied sciences, 2D materials, Chemical vapor deposition, Graphene, Large-scale graphene, Monolithic device fabrication


Since 1958, the concept of integrated circuit (IC) has achieved great technological developments and helped in shrinking electronic devices. Nowadays, an IC consists of more than a million of compacted transistors.

The majority of current ICs use silicon as a semiconductor material. According to Moore's law, the number of transistors built-in on a microchip can be double every two years. However, silicon device manufacturing reaches its physical limits. To explain, there is a new trend to shrinking circuitry to seven nanometers where a lot of unknown quantum effects such as tunneling effect can not be controlled. Hence, there is an urgent need for a new platform material to replace Si.

Graphene is considered a promising material with enormous potential applications in many electronic and optoelectronics devices due to its superior properties.

There are several techniques to produce graphene films. Among these techniques, chemical vapor deposition (CVD) offers a very convenient method to fabricate films for large-scale graphene films. Though CVD method is suitable for large area growth of graphene, the need for transferring a graphene film to silicon-based substrates is required. Furthermore, the graphene films thus achieved are, in fact, not single crystalline. Also, graphene fabrication utilizing Cu and Ni at high growth temperature contaminates the substrate that holds Si CMOS circuitry and CVD chamber as well. So, lowering the deposition temperature is another technological milestone for the successful adoption of graphene in integrated circuits fabrication.

In this research, direct large-scale graphene film fabrication on silicon based platform (i.e. SiO2 and Si3N4) at low temperature was achieved. With a focus on low-temperature graphene growth, hot-filament chemical vapor deposition (HF-CVD) was utilized to synthesize graphene film using 200 nm thick nickel film. Raman spectroscopy was utilized to examine graphene formation on the bottom side of the Ni film and on the silicon-based substrate. Large- area bilayer graphene film was formed on silicon based platform.

COMSOL Multiphysics was used to investigate the CVD graphene growth on Ni films. Factors affecting CVD graphene synthesis include carbon solubility in Ni, growth time, growth temperature, as well as Ni film thickness. COMSOL model uses transport of diluted species, heat transfer in Ni thin film as well as deformed geometry module. In this particular research, the number of simulated graphene layers on Ni film was compared with experimental data. Also, the effect of many CVD parameters on graphene film fabrication is stated.

In conclusion, a novel method for direct large-scale graphene film fabrication on silicon based platform at low temperature was achieved using hot-filament chemical vapor deposition.