Date of Graduation


Document Type


Degree Name

Master of Science in Electrical Engineering (MSEE)

Degree Level



Electrical Engineering


Homer Mantooth

Committee Member

Simon Ang

Second Committee Member

Juan Balda


Gate Driver, MOSFET, Power Electronics, SiC, Silicon Carbide


The objective of this thesis is to assess the challenges associated with driving Silicon Carbide (SiC) power devices, and to compare the potential gate drive methods for these devices which address those challenges. SiC power devices present many benefits that make them suitable for next generation automotive, power utility grid, and energy management applications. High efficiency, increased power density, and reliability at high-temperatures are some of the main benefits of SiC technology. However, the many challenges associated with these devices have prevented their adoption into industry applications. The argument is made in this thesis that the gate driver is a key component in providing proper control to enable the reliable and high performance of these devices. Thus, as the main control mechanism, the gate driver topology should be carefully considered in the design of SiC-based converters.

In this thesis, the main issues and challenges of operating SiC power devices will be explored, and the common mitigation techniques will be discussed. Next, the switching operation of the SiC power MOSFET and the loss analysis will be performed for the voltage-mode and current-mode drivers. Additionally, a solution incorporating a multi-level voltage-mode driver is proposed as an alternative to the other methods. The comparison of these techniques and their ability mitigate EMI and other negative consequences of fast-switching while minimizing switching energy losses will be analyzed. This is done through the comparison of the methods based on the analytical approach, through the use of simulations using device models, and through experimentation. The multi-level driver is found to be good alternative to the conventional voltage-mode driver, and is thus assessed in detail in the experiments. Finally, the considerations for the experimental setup using the double pulse test (DPT) is also discussed. Conclusions are made based on the performance of the device under multi-level turn-off, and future considerations for enabling the next generation high-voltage SiC MOSFETs are discussed.