Date of Graduation
Master of Science in Computer Engineering (MSCmpE)
Computer Science & Computer Engineering
Second Committee Member
Dale R. Thompson
Third Committee Member
Asynchronous, Circuit, Digital, MTNCL, Synthesis, VHDL
As the demand for an energy-efficient alternative to traditional synchronous circuit design grows, hardware designers must reconsider the traditional clock tree. By doing away with the constrains of a clock, asynchronous sequential circuit designs can achieve a much greater level of efficiency. The utilization of asynchronous logic synthesis flows has enabled researchers to better implement asynchronous circuit designs which have been optimized using the same industry standard tools that are already used in sequential synchronous designs. This thesis offers a new flow for such tools which implements the MTNCL asynchronous circuit architecture.
Mize, Nicholas Renoudet, "Asynchronous Circuit Synthesis Using Multi-Threshold NULL Convention Logic" (2019). Theses and Dissertations. 3168.