Document Type


Publication Date



Describes an electrical interconnection medium having first and second overlying interconnection layers. Each interconnection layer includes parallel conductors, and the conductors of the first and second interconnection layers are oriented orthogonally to each other. The conductors can be interconnected to form at least two electrical planes, with the conductors of the electrical planes being substantially interdigitated on each interconnection layer, portions of each plane appearing on both layers. The interconnection medium is advantageously employed as a multichip module. A method of designing such an MCM includes providing arranged conductive regions in a spaced manner, cutting selected sections to form signal conductor paths, and then filling spaces between like power and ground conductors. Another embodiment provides arranging touching conductive regions, defining signal path areas along uniformly-spaced touching borders, and then carving away conductive material to form desirably positioned and spaced power, ground and signal conductors.


Electrical Engineering

Patent Number


Application Filed



Board of Trustees of the University of Arkansas (Little Rock, AR)


The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Grant No. MDA972-93-1-0036 awarded by the Advanced Research Projects Agency (APRA).

Leonard W. Schaper, Department of Electrical Engineering, University of Arkansas, Fayetteville, AR