Document Type
Patent
Publication Date
7-14-2015
Abstract
A Static Sleep Convention Logic (SSCL) circuit is described. The circuit improves upon Multi-Threshold NULL Convention Logic (MTNCL), disclosed in U.S. Pat. No. 7,977,972, by utilizing the SECRII architecture along with the Bit-Wise MTNCL technique, to produce a new SSCL gate without an nsleep input, which yields a smaller and faster circuit that utilizes less energy per operation than the patented SMTNCL gate design, while only very slightly increasing leakage power during sleep mode.
Department
Electrical Engineering; Computer Science & Computer Engineering
Patent Number
US9083337
Application Number
US20130181740 A1
Application Published
7-18-2013
Application Filed
1-11-2013
Assignee
Board of Trustees of the University of Arkansas (Little Rock, AR)
Citation
Smith, S. C., & Di, J. (2015). Multi-threshold sleep convention logic without nsleep. Patents Granted. Retrieved from https://scholarworks.uark.edu/pat/8
Comments
Scott C. Smith, Department of Electrical Engineering; Jia Di, Department of Computer Science and Computer Engineering