Date of Graduation

5-2014

Document Type

Thesis

Degree Name

Bachelor of Science in Electrical Engineering

Degree Level

Undergraduate

Department

Electrical Engineering

Advisor

Mantooth, H. Alan, 1963-

Abstract

Due to their flexibility and usefulness operational amplifiers are a very common circuit component that has been in use for over fifty years. Because of their widespread use in circuits there has always been a need for simulation models of the op amp. The purpose of this thesis is to demonstrate the design a tool for use with the modeling software ModLyng that takes several parameters from the datasheet of an op amp and generates a model that can be exported to several popular hardware description languages including Verilog-A and Verilog-AMS. The tool was designed as a plugin for ModLyng written in the programming language python. Several models were generated from the op amp datasheets and simulated. The results of these simulations were then compared to the datasheet results.

Share

COinS