SoC Design Of A Novel Cluster-Based Approach for Real-Time Lane Detection in Low Quality Images

Authors

Cristophe Bobda, University of Arkansas, Fayetteville
Jubaer Hossain Pantho, University of Arkansas, Fayetteville
Cindy Roullet, University of Arkansas, Fayetteville
Abdelaziz Bensrhair, University of Arkansas, Fayetteville
Samia Ainouz, University of Arkansas, Fayetteville

Document Type

Article - Abstract Only

Publication Date

2017

Keywords

Hardware, System on a chip

Abstract

In this paper, we present a novel System on Chip design for real time lane detection approach on low-quality grayscale images. The proposed method leverages the sequential read out from image sensors to progressively build clusters. The decision to allocate pixels to existing lines (clusters) is made on the fly as pixels flow from the image sensor into the system. We propose a hardware/software partitioning that places low-level computational intensive parts in a pipelined chain in hardware. The pipeline first applies morphological operations on incoming images to enhance their quality. Later canny edge detection followed by Probabilistic Hough Transform is used for accurate line detection. The lines are then filtered and clustered before being fitted into road lanes using weighted least squares method. We prototype our design on a system on FPGA with a precision above 90% and demonstrate a speedup of 2.09x compared to a software only implementation on an embedded processor.

Comments

Principal Investigator: Cristophe Bobda

Citation

Bobda, C., Pantho, M. J. H., Roullet, C., Bensrhair, A., & Ainouz, S. (2017). SoC design of A novel cluster-based approach for real-time lane detection in low quality images. Paper presented at the Proceedings of the 11th International Conference. https://doi.org/10.1145/3131885.3131934.