A System on FPGA for Fast Handwritten Digit Recognition in Embedded Smart Cameras

Authors

Jubaer Hossain Pantho, University of Arkansas, Fayetteville
Festus Hategekimana, University of Arkansas, Fayetteville
Cristophe Bobda, University of Arkansas, Fayetteville

Document Type

Article - Abstract Only

Publication Date

2017

Keywords

Hardware, System on a chip

Abstract

This paper presents the first FPGA SoC implementation solution to the hand-written multi-digit numbers recognition problem. Our proposed solution employs a novel digit extraction method which relies on the identification of images' non-zeros columns instead of the widely used computationally-expensive segmentation method. Digit prediction is performed by a multi-layer neural network. The paper presents a design and an FPGA implementation of the proposed solution; and also discusses various optimization techniques in the neural network implementation that lead to increased performance. Our proposed solution achieves a 96.76% detection accuracy and up to 2.47x speed-up in comparison to software solutions.

Comments

Principal Investigator: Cristophe Bobda

Citation

Md Jubaer Hossain Pantho, Festus Hategekimana, and Christophe Bobda. 2017. A System on FPGA for Fast Handwritten Digit Recognition in Embedded Smart Cameras. In Proceedings of the 11th International Conference on Distributed Smart Cameras (ICDSC 2017). ACM, New York, NY, USA, 35-40. DOI: https://doi.org/10.1145/3131885.3131927