Title

An embedded system for handwritten digit recognition

Document Type

Article

Publication Date

2015

Keywords

Neural network, Soft processor, Regularization, Image processing

Abstract

The goal of this work is the design and implementation of a low-cost system-on-FPGA for handwritten digit recognition, based on a relatively deep and wide network of perceptrons. In order to increase the performance of the application on embedded processors whose performances are way below standard general purpose CPUs, a regularization method was used during the training phase of the neural network that allows for the drastic reduction of floating point operations. Our implementation achieves a 3× speed-up toward a raw implementation without optimization, while keeping the accuracy in acceptable ranges. Our efforts reinforce the fact that FPGAs are suited for deploying complex artificial intelligence modules.

Comments

Principal Investigator: Cristophe Bobda Acknowledgements: This work was supported in part by the National Science Foundation (NSF)380under Grant 1302596.

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