Date of Graduation

5-2020

Document Type

Thesis

Degree Name

Master of Science in Electrical Engineering (MSEE)

Degree Level

Graduate

Department

Electrical Engineering

Advisor/Mentor

Simon S. Ang

Committee Member

Fang Luo

Second Committee Member

Roy A. McCann

Keywords

cascode, JFET, power module fabrication, SiC

Abstract

Silicon carbide (SiC), a wide-bandgap semiconductor material, greatly improves the performance of power semiconductor devices. Its electrical characteristics have a positive impact on the size, efficiency, and weight of the power electronics systems. Parasitic circuit elements and thermal properties are critical to the power electronics module design. This thesis investigates the various aspects of layout design, electrical simulation, thermal simulation, and peripheral design of SiC power electronic modules. ANSYS simulator was used to design and simulate the power electronic modules. The parasitic circuit elements of the power module were obtained from the device parameters given in the datasheet of these SiC bare devices together with the model established in the Q3D simulator. A temperature simulation model is established using SolidWorks to investigate the thermal performance of the power module. The designs of soldering and sintering fixtures are presented. A 1.7kV silicon carbide (SiC) junction field-effect transistor (JFET) cascode power electronic module was designed as an example. By comparing the different module designs, some conclusions are elucidated.

Download

Share

COinS