Date of Graduation

5-2024

Document Type

Dissertation

Degree Name

Doctor of Philosophy in Engineering (PhD)

Degree Level

Graduate

Department

Electrical Engineering

Advisor/Mentor

Juan C. Balda

Committee Member

Yue Zhao

Second Committee Member

Chris Farnell

Third Committee Member

David Huitink

Keywords

DC-DC transformer; Dual-Active-Bridge; High-Voltage SiC; Medium-Voltage Grid

Abstract

The objective of this dissertation is to present the theoretical analysis, design process, application and manufacturing of a proposed solid-state transformer intended for medium-voltage applications with minimal high-frequency oscillations. Galvanic isolation on medium-voltage DC-DC converters tend to employ large number of turns in the high voltage side of the transformers leading to non-negligible parasitic stray capacitances which form resonance tanks with the transformer inductances. Therefore, it is critical to estimate these parasitic capacitances to avoid severe high frequency oscillations which can significantly impact the converter performance. The main contribution of this thesis is the extension of a proposed custom-core design methodology of high-frequency transformers to include parasitic capacitance prediction during the design phase to lessen the effect of high frequency oscillations on the DC-DC converter. Additionally, the proposed methodology is applied to the design of a single-core three-phase transformer for medium-voltage applications. The design and manufacturing of a 150-kW medium-voltage DC-DC solid-state transformer is presented. Impedance responses of the design transformer are studied to identify the impact of the parasitic self-capacitance. Experimental testing of the proposed medium-voltage DC-DC solid-state transformer above 100-kW is presented and analyzed.

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