Date of Graduation
8-2024
Document Type
Dissertation
Degree Name
Doctor of Philosophy in Engineering (PhD)
Degree Level
Graduate
Department
Electrical Engineering
Advisor/Mentor
Chen, Zhong
Committee Member
Yu, Shui-Qing
Second Committee Member
Ware, Morgan E.
Third Committee Member
Di, Jia
Keywords
Electrostatic discharge; SiC; High temperature
Abstract
This dissertation explores the development and optimization of electrostatic discharge (ESD)-robust, low-voltage CMOS technology using 4H-silicon carbide (SiC) tailored for high-temperature applications, addressing the critical need for reliable semiconductor devices in harsh environmental conditions. The advent of SiC as a semiconductor material offers significant advantages over traditional silicon (Si) in harsh environments, including higher thermal conductivity, greater electron mobility, and improved electrical characteristics at elevated temperatures. This research explores the integration of 4H-SiC into CMOS technology to enhance device reliability and performance in extreme conditions such as those found in aerospace, automotive, and energy sectors. The study begins with a comprehensive review of the material properties of SiC, focusing on its robustness and suitability for high-temperature operations. It proceeds to discuss the challenges of implementing SiC in CMOS processes, particularly the issues of oxidation, interface traps, and the reliability of gate oxides. Experimental methodologies involved detailed characterization of n-channel and p-channel MOSFETs fabricated using a tailored fabrication process for high temperature. Theoretical analysis, backed by Technology Computer Aided Design (TCAD) simulations and physical experimentation, was employed to investigate and mitigate phenomena such as channel mobility degradation and threshold voltage instability. Key findings from the research demonstrate that 4H-SiC-based CMOS devices exhibit significant improvements in durability and operational stability up to 500°C. Furthermore, the study provides an insightful discussion on the ESD protection design based on the 4H-SiC CMOS technology. The dissertation explores the ESD performance of a variety of SiC ESD devices (such as resistor, diode, bipolar, MOSFET, SCR, etc.) and highlights the status and development in terms of the implementation to commercial applications. In conclusion, this research substantiates the viability of 4H-SiC CMOS technology for next-generation semiconductor applications, proposing a solid foundation for future explorations into more complex integrated circuits and systems. Meanwhile, the development of ESD protections in this work are significant, offering a pathway to more reliable and efficient electronic components capable of operating under high-voltage and high-current conditions, thereby improving the reliability of the electronics under high temperature.
Citation
Wang, H. (2024). ESD-robust 4H-SiC Low-voltage CMOS Technology Development for High Temperature. Graduate Theses and Dissertations Retrieved from https://scholarworks.uark.edu/etd/5497