Date of Graduation
12-2024
Document Type
Dissertation
Degree Name
Doctor of Philosophy in Engineering (PhD)
Degree Level
Graduate
Department
Electrical Engineering and Computer Science
Advisor/Mentor
Mantooth, H. Alan
Committee Member
Di, Jia
Second Committee Member
Chen, Zhong
Third Committee Member
Dix, Jeff
Keywords
CMOS; Gate Driver; High-temperature; Power module; SiC; SOI
Abstract
The shift toward electrification in transportation, including electric and hybrid vehicles, presents challenges for power electronic converters. Silicon Carbide (SiC) power devices are promising due to their high efficiency, temperature tolerance, and reduced losses compared to traditional silicon devices. However, their use is hindered by issues such as parasitic capacitances and gate inductances, which can lead to voltage spikes and stress on the device gate oxide, hence impacting converter reliability. Increasing gate resistance can help manage these issues, but it reduces switching speed and increases losses. Snubber circuits can mitigate switching stress but add extra components, reducing efficiency. Active gate drivers (AGDs) effectively control gate waveforms and reduce oscillations but increase circuit complexity. Improving PCB design and device packaging can help reduce signal routing issues, but it doesn't address overall system volume. An effective solution is to integrate the gate driver within the power module itself, reducing parasitic inductance and potentially lowering system volume. This integration also simplifies cooling needs, enhancing the power-to-volume and power-to-weight ratios. Research is focusing on developing high-temperature gate drivers to work with SiC modules, as conventional silicon drivers cannot withstand the high temperatures involved. In the literature, a number of module-integrated gate driver topologies built using high-temperature processes such as silicon carbide (SiC) and silicon on insulator (SOI), as well as the typical Si process, have been showcased. A high-temperature single-chip gate driver solution for power module integration and a thorough system-level evaluation are presented through this dissertation work. The unique gate driver architecture is realized on a commercial silicon-on-insulator (SOI) process that can safely operate up to 175°C, even beyond this temperature. The non-isolated gate driver architecture combines variable drive strength features and other auxiliary protection circuits into a single chip. The protection circuits include active Miller clamp, under-voltage lockout (UVLO), PWM input signal filtration, over-temperature detection, over-current detection, and soft shutdown in case of any fault detection. A detailed architecture of the module-integrable gate driver PCB accommodating this bare die gate driver is presented afterwards. The external gate driver power supply board to provide the required voltage and signal isolations to the gate driver die and their connections to the module-integrated gate driver PCB are also thoroughly outlined. To validate the functionality of this custom-built gate driver, power switch test results are methodically investigated. Towards the end, a conceptual SiC power module with flip-chip capable CMOS SiC gate drivers is presented in an effort to reduce the gate loop inductance even lower and increase the overall system reliability.
Citation
Faruque, K. A. (2024). Gate Driver Design in High-temperature CMOS Process for Heterogeneous Integration inside SiC Power Module. Graduate Theses and Dissertations Retrieved from https://scholarworks.uark.edu/etd/5536
