Date of Graduation
12-2024
Document Type
Thesis
Degree Name
Master of Science in Electrical Engineering (MSEE)
Degree Level
Graduate
Department
Electrical Engineering and Computer Science
Advisor/Mentor
Mantooth, H. Alan
Committee Member
Chen, Zhong
Second Committee Member
Dix, Jeff
Third Committee Member
Ware, Morgan E.
Keywords
Low dropout regulator; CMOS process; Battery-operated applications; Line regulation; Load regulation; Voltage regulator testing
Abstract
This thesis presents the design, simulation, layout, and testing of a low dropout linear voltage regulator (LDO) in a 180 nm CMOS process. The LDO is intended for use in low-power, battery-operated applications, and it has an adjustable output for a variety of different implementations. It can supply up to 100 mA of current, which is enough to power many small electronic circuits. It has a dropout voltage of 150 mV, and it consumes less than 200 μA of current during operation, which is on par with many commercial regulators. The line regulation is also comparable to commercially available LDOs, at 0.035%, making it stable over a range of different supply conditions. The simulated load regulation is 0.038%, which is also excellent, however, the test circuit degraded the measured load regulation, so the measured figure is higher than expected. This test circuit error is discussed, and some errors resulting from device mismatch in fabrication are also presented and explained.
Citation
Vail, N. (2024). A CMOS LDO Voltage Regulator for Low Power Applications. Graduate Theses and Dissertations Retrieved from https://scholarworks.uark.edu/etd/5585
