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Date of Graduation
5-2026
Description
High-resolution capacitive sensor arrays are widely used in applications such as robotics, wearable devices, and biomedical devices where accurate detection of touch, proximity, and motion is crucial. As these systems are scaled up to achieve higher resolutions, challenges pertaining to communication reliability, data synchronization, and system latency become more important. Capacitive sensor arrays detect changes in capacitance caused by disturbances in nearby electric fields. While these arrays are effective at small scales, large arrays often suffer from signal degradation and latency when all sensors rely on a single controller and communication bus. This research addresses these challenges by developing a scalable 32x32 capacitive sensor array that uses multiple microcontrollers controlled by a field programmable gate array (FPGA) through a distributed, multi-bus I2C communication system. To improve scalability, this project distributed sensing across multiple Texas Instruments MSP430 microcontrollers, each responsible for an 8x8 section of the array. Sensor data from these microcontrollers was transmitted using the I2C protocol and collected by an FPGA acting as the system’s master device. Initial testing produced a working 16x16 array using four microcontrollers on a single I2C bus. Building on these results, the FPGA enabled simultaneous data collection from all four buses, which reduced latency and improved scalability compared to traditional single bus designs. Once fully integrated, the 32x32 sensor was calibrated and tested for signal integrity, spatial resolution, and responsiveness. The completed system produced synchronized, high-resolution capacitive data suitable for gesture recognition. The results demonstrate that a distributed, FPGA-controlled architecture can reliably support large-scale capacitive sensing without sacrificing performance. This work contributes a modular and scalable design approach that can be extended to future research in robotics, interactive wearable devices, and FPGA-based signal processing systems requiring high-resolution sensing and low-latency data acquisition.
Publication Date
2026
Document Type
Book
Degree Name
Bachelor of Science in Electrical Engineering
Degree Level
Undergraduate
Department
Electrical Engineering
Advisor/Mentor
Nelson, Alexander
Disciplines
Electrical and Computer Engineering
Keywords
Engineering
Citation
Digby, J. (2026). Development of a Scalable 32x32 Capacitive Sensing Array Using FPGA Controlled Multi-Bus I2C Communication. 2026 Research Poster Competition. Retrieved from https://scholarworks.uark.edu/hnrcsturpc26/79