Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures

Authors

• Hui Wang, University of Arkansas, Fayetteville
• Pengyu Lai, University of Arkansas, Fayetteville
• Affan Abbasi, University of Arkansas, Fayetteville
• Maksudul Hossain, University of Arkansas, FayettevilleFollow
• Asif Faruque, University of Arkansas, Fayetteville
• Alan H. Mantooth, University of Arkansas, FayettevilleFollow
• Zhong Chen, University of Arkansas, FayettevilleFollow

Document Type

Article

Publication Date

11-27-2024

Abstract

SiC-based n-channel and p-channel MOSFETs fabricated by Fraunhofer IISB SiC CMOS technology are characterized from room temperature up to 300◦C. The behaviors of these low voltage devices including the short-channel effect (SCE), p-type ohmic contact with high resistivity, and the low channel mobility due to the SiC/SiO2 interface are presented. A thorough analysis is performed to understand the cause of low channel mobility, with TCAD simulations specifically on p-channel MOSFET, providing an insight into the impact of channel length, interface traps, and contact resistivity on device performance. The analysis in this paper is important in the comprehension of the low-voltage SiC MOSFETs so as to achieve balanced n-channel and p-channel MOSFETs and lead to the monolithic integration of SiC ICs with SiC power devices.

Comments

Web of Science

Citation

Wang, H., Lai, P., Abbasi, A., Hossain, M., Faruque, A., Mantooth, A. H., & Chen, Z. (2024). Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures. Journal of the Electron Devices Society, 13, 24-33. https://doi.org/10.1109/JEDS.2024.3506922

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

Keywords

Silicon carbide; MOSFET; Silicon; Doping; CMOS process; Threshold voltage; Temperature measurement; Logic gates; Performance evaluation; Low voltage; CMOS; high temperature; TCAD; channel mobility; SiC/SiO2 interface