Date of Graduation
12-2024
Document Type
Thesis
Degree Name
Bachelor of Science in Computer Science
Degree Level
Undergraduate
Department
Computer Science and Computer Engineering
Advisor/Mentor
Jin, Kevin
Committee Member
Farnell, Chris
Second Committee Member
Panda, Brajendra
Abstract
Phasor Measurement Unit (PMU) systems are essential for real-time power grid monitor- ing but often face data loss due to network delays, equipment malfunctions, or transmis- sion errors. Traditional centralized recovery solutions introduce significant latency and scalability challenges. This thesis presents a P4-based in-network recovery mechanism that embeds detection and recovery directly into the data plane of P4-enabled programmable switches, significantly reducing recovery time and infrastructure complexity. Using the Aurora 610 switch, the system detects missing packets via sequence number analysis and recovers magnitudes with an efficient register-based algorithm.
Evaluation demonstrates high accuracy and low latency, achieving a mean absolute percentage error (MAPE) of 0.39% and an average processing latency of 336.99 nanosec- onds with a 2.52-nanosecond standard deviation at a 5% packet loss rate. These results highlight the potential of programmable networks for scalable, efficient, and resilient PMU data recovery, advancing grid monitoring and anomaly detection in real-time applications.
Keywords
Phasor Measurement Unit; In-Network Data Recovery; Programmable Network; P4; Data Plane
Citation
Bonar, E. M. (2024). Leveraging P4 Programmable-Hardware Switches for In-Network PMU Packet Recovery. Electrical Engineering and Computer Science Undergraduate Honors Theses Retrieved from https://scholarworks.uark.edu/elcsuht/1
Included in
Computer and Systems Architecture Commons, Digital Communications and Networking Commons, Electrical and Electronics Commons, Hardware Systems Commons, Power and Energy Commons, Systems and Communications Commons