Date of Graduation

5-2024

Document Type

Dissertation

Degree Name

Doctor of Philosophy in Engineering (PhD)

Degree Level

Graduate

Department

Electrical Engineering

Advisor/Mentor

H. Alan Mantooth

Committee Member

Yue Zhao

Second Committee Member

Xiaoqing Song

Third Committee Member

Robert Cuzner

Keywords

MOSFET; silicon carbide; multi-objective optimization; stacked substrates; electric-potential-oriented module-system interface

Abstract

This dissertation introduces a holistic and systematic design methodology tailored to the 10 kV silicon carbide (SiC) MOSFET power modules to achieve multi-objective optimization with enhanced electric-field (E-field) distribution, minimized common-mode (CM) parasitic capacitance, and reduced system-level parasitic inductances. The proposed approach encompasses two innovative techniques: 1) an electric-potential-oriented module-system interface to reduce system-level parasitic inductance while maximizing insulation capability; 2) stacked substrates with patterned middle layer copper to alleviate the E-field concentration at the triple-point and reduce the maximum E-field without compromising on thermal resistance. The effectiveness of these innovative approaches is substantiated through the development of a 10 kV SiC MOSFET power module. Experimental validation showcases its robust voltage insulation capability with 0.87 µA leakage current at 10 kV, a 33 kV DC and 25 kV AC surface flashover for worst-case system fault conditions, a well-balanced 5.6 nH power loop inductance with embedded decoupling capacitors, a record-low 28 pF common mode (CM) parasitic capacitance, owing to the middle layer pattern structure, as well as a 38.6% E-filed concentration reduction at the triple-point. The partial discharge inception voltage (PDIV) of the proposed middle layer patterned stacked substrates is verified at 16.8 kVrms. Dynamic performance validation through a double-pulse test at 5 kV showcases negligible ringing and voltage overshot. All these exceptional attributes position the packaged 10 kV SiC MOSFET power module as an exemplary choice for MV power electronics applications.

Available for download on Thursday, July 16, 2026

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