Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process

Author

Kyle Addington, University of Arkansas, FayettevilleFollow

Date of Graduation

5-2017

Document Type

Thesis

Degree Name

Bachelor of Science in Electrical Engineering

Degree Level

Undergraduate

Department

Electrical Engineering

Advisor/Mentor

Mantooth, H. Alan

Committee Member/Reader

Wu, Jingxian

Abstract

This thesis covers the design of a Folded Cascode CMOS Operational Amplifier (Op-Amp) in Raytheon’s 1.2-micron Silicon Carbide (SiC) process. The use of silicon-carbide as a material for integrated circuits (ICs) is gaining popularity due to its ability to function at high temperatures outside the range of typical silicon ICs. The goal of this design was to create an operational amplifier suitable for use in a high temperature analog-to-digital converter application. The amplifier has been designed to have a DC gain of 50dB, a phase margin of 50 degrees, and a bandwidth of 2 MHz. The circuit’s application includes input ranging from 0 volts to 8 volts so a PMOS input differential pair was selected to allow the input range down to the VSS rail. The circuit has been designed to work over a temperature range of 25°C to 300°C.

Citation

Addington, K. (2017). Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process. Electrical Engineering Undergraduate Honors Theses Retrieved from https://scholarworks.uark.edu/eleguht/53